Episode

Page Tables

Podcast
The Backend Engineering Show with Hussein Nasser
Published
Dec 15, 2025
Duration seconds
2799
Processing state
not_requested
Canonical source
https://podcasters.spotify.com/pod/show/hnasr/episodes/Page-Tables-e39dvhk
Audio
https://anchor.fm/s/1eb6d14/podcast/play/109558772/https%3A%2F%2Fd3ctxlq1ktw2nl.cloudfront.net%2Fstaging%2F2025-9-12%2F89d74d1b-3aa5-a9d6-6b87-9ccf9f7c6599.m4a
JSON
/v1/public/podcasts/the-backend-engineering-show-with-hussein-nasser-847440/episodes/page-tables
Markdown
/podcast/the-backend-engineering-show-with-hussein-nasser-847440/page-tables.md

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Summary

Page tables provide the mapping between virtual memory and physical memory for each process. This means it needs to be as efficient and as fast as possible. I explore the inner workings of page tables in this episode. 0:00 Intro 2:00 Virtual Memory ⁃ ⁃ 8:00 MMU 10:00 Page Tables ⁃ ⁃ ⁃ ⁃ ⁃ ⁃ ⁃ 11:30 Single Table Byte Addressability ⁃ ⁃ ⁃ ⁃ ⁃ ⁃ ⁃ ⁃ 16:00 Single Table Page addressability ⁃ ⁃ ⁃ ⁃ ⁃ 19:00 Multi-level Paging (Radix tree) ⁃ ⁃ 31:00 Huge Tables ⁃ ⁃ 33:00 TLB ⁃ ⁃ Summary